1. Field
Example embodiments relate to vertical memory devices and methods of manufacturing the same.
2. Description of the Related Art
Vertical memory devices may increase integration density in comparison to planar devices. In a method of manufacturing a vertical memory device, after alternately depositing a plurality of memory cells and insulation layers, the memory cells and the insulation layers are etched to form an opening. Polysilicon is deposited in the opening and impurities are implanted therein to form a channel and a pad. Threshold voltages of the channels and/or the pad currents may vary according to variations of doping profiles of the impurities. A more uniform doping of impurities may thus be desired.